5G NR
Remote Command - UL FRC Config
User Interface - UL FRC Config
SCPI Command |
[:SOURce]:RADio:NR5G:WAVeform[:ARB]:CCARrier<carrier>:CONFig:FRC "FRC: FR1A11|FR1A12|FR1A13|FR1A14|FR1A15|FR1A16|FR1A17|FR1A18|FR1A19|FR1A110|FR1A111|FR1A112|FR1A113|FR1A114|FR1A115|FR1A116|FR1A117|FR1A118|FR1A119|FR1A21|FR1A22|FR1A23|FR1A24|FR1A25|FR1A26|FR1A27|FR1A28|FR1A29|FR1A210|FR1A211|FR1A212|FR1A213|FR1A214|FR1A38|FR1A39|FR1A310|FR1A311|FR1A312|FR1A313|FR1A314|FR1A322|FR1A323|FR1A324|FR1A325|FR1A326|FR1A327|FR1A328|FR1A331|FR1A332|FR1A333|FR1A333A|FR1A334|FR1A334A|FR1A3A1|FR1A3A2|FR1A3A3|FR1A3A4|FR1A3B1|FR1A3B2|FR1A3B3|FR1A3B4|FR1A48|FR1A49|FR1A410|FR1A411|FR1A412|FR1A413|FR1A414|FR1A422|FR1A423|FR1A424|FR1A425|FR1A426|FR1A427|FR1A428|FR1A429|FR1A429A|FR1A430|FR1A430A|FR1A431|FR1A431A|FR1A432|FR1A432A|FR1A58|FR1A59|FR1A510|FR1A511|FR1A512|FR1A513|FR1A514|FR1A515|FR1A516|FR1A81|FR1A82|FR1A83|FR1A84|FR1A91|FR1A92|FR1A93|FR1A94|FR1A95|FR2A11|FR2A12|FR2A13|FR2A14|FR2A15|FR2A31|FR2A32|FR2A33|FR2A34|FR2A35|FR2A36|FR2A37|FR2A38|FR2A39|FR2A310|FR2A311|FR2A312|FR2A31|FR2A314|FR2A315|FR2A316|FR2A317|FR2A318|FR2A319|FR2A320|FR2A321|FR2A322|FR2A323|FR2A324|FR2A325|FR2A326|FR2A3A1|FR2A3A2|FR2A3A3|FR2A3A4|FR2A3A5|FR2A3A6|FR2A3A7|FR2A3A8|FR2A41|FR2A42|FR2A43|FR2A44|FR2A45|FR2A46|FR2A47|FR2A48|FR2A49|FR2A410|FR2A411|FR2A412|FR2A413|FR2A414|FR2A415|FR2A416|FR2A417|FR2A418|FR2A419|FR2A420|FR2A51|FR2A52|FR2A53|FR2A54|FR2A55|FR2A56|FR2A57|FR2A58|FR2A59|FR2A510|FR2A71|FR2A72|FR2A73|FR2A74|FR2A75|FR2A76|FR2A77|FR2A78|FR2A79|FR2A710, Bandwidth: FR1BW5M|FR1BW10M|FR1BW15M|FR1BW20M|FR1BW25M|FR1BW30M|FR1BW35M|FR1BW40M|FR1BW45M|FR1BW50M|FR1BW60M|FR1BW70M|FR1BW80M|FR1BW90M|FR1BW100M|FR2BW50M|FR2BW100M|FR2BW200M|FR2BW400M,PUSCHMappingType: TYPEA|TYPEB, RBOffset: <integer>, PhaseCompensation: AUTO|MANual|OFF, SpecialSlot: ON|OFF|1|0, DuplexType: FDD|TDD, SlotConfigurationPeriod: MS0P5|MS0P625|MS1|MS2|MS1P25|MS2P5|MS5|MS10, NumberOfDownlinkSlots: <integer>, NumberOfDownlinkSymbols: <integer>, NumberOfUplinkSlots: <integer>, NumberOfUplinkSymbols: <integer>, DMRSTypeAPos: <integer>, NumberOfUciBits: <integer>" |
SCPI Example |
RAD:NR5G:WAV:CCAR0:CONF:FRC "FRC: FR1A13, Bandwidth: FR1BW25M, RBOffset: 2, PhaseCompensation: AUTO, DuplexType: FDD" |
Couplings |
Parameters of FRC and their default value are listed below. FRC: FR1A12 Bandwidth: FR1BW100M PUSCHMappingType: TYPEA RBOffset: 0 PhaseCompensation: AUTO SpecialSlot: OFF DuplexType: FDD SlotConfigurationPeriod: MS5 NumberOfDownlinkSlots: 7 NumberOfDownlinkSymbols: 6 NumberOfUplinkSlots: 2 NumberOfUplinkSymbols: 4 One combined string is needed to be inputted in SCPI command. The format of it is "name: value , name: value …" . Default value will be used if parameter is not provided. The order of parameters does not matter. Parameter's name and value are case sensitive. If parameter's name is incorrect, error " -224, "Illegal parameter value; xxx is incorrect parameter name." will be generated. If parameter's type is enum and the supplied enum value is illegal, error " -224, Illegal parameter value; xxx has incorrect value." will be generated. |
Notes |
In A.10.00, the following FRC are added: FR1A110, FR1A111, FR1A112, FR1A113, FR1A114, FR1A115, FR1A116, FR1A117, FR1A118, FR1A119, FR1A27, FR1A28, FR1A29, FR1A210, FR1A211, FR1A212, FR1A213, FR1A214, FR1A333, FR1A333A, FR1A334, FR1A334A, FR1A3A1, FR1A3A2, FR1A3A3, FR1A3A4, FR1A3B1, FR1A3B2, FR1A3B3, FR1A3B4, FR1A429, FR1A429A, FR1A430, FR1A430A, FR1A431, FR1A431A, FR1A432, FR1A432A, FR1A515, FR1A516, FR1A81, FR1A82, FR1A83, FR1A84, FR2A325, FR2A326, FR2A3A1, FR2A3A2, FR2A3A3, FR2A3A4, FR2A3A5, FR2A3A6, FR2A3A7, FR2A3A8, FR2A71, FR2A72, FR2A73, FR2A74, FR2A75, FR2A76, FR2A77, FR2A78, FR2A79, FR2A710 In A.10.00, DMRSTypeAPos and NumberOfUciBits can be set in the following cases. Otherwise, they will be ignored. Case1: DMRSTypeAPos can be set when PUSCHMappingType = TYPEA & FRC = FR1A333 | FR1A334 | FR1A333A | FR1A334A | GFR1A429 | FR1A430 | FR1A429A | FR1A430A | FR2A71 | FR2A72 Case2: NumberOfUciBits can be set when FRC = FR2A43 | FR2A413 | FR1A411. NumberOfUciBits value is 7, if input value is not equal to 40. In A.10.00, if Real-Time Uplink mode is enabled, the following Bandwidth values are invalid: FR2BW200M, FR2BW400M |
Initial S/W Revision |
A.09.00 |
Modified S/W Revision |
A.10.00, A.12.00 |
GUI Location |
Apps > 5G NR > Carrier UL > UL FRC Config |
Initial S/W Revision |
A.01.00 |
Modified S/W Revision |
A.09.00, A.10.00, A.11.00, A.12.00 |
Choices:
Downlink: Based on the Table 5.3.2-1 and 5.3.2-2 in 38.104
Uplink: Based on the Table 5.3.2-1 in 38.101-1 and 38.101-2
Selects the bandwidth configuration for the carrier.
Choices: Based on the Annex A in 38.141
Selects the FRC Type.
Choices: 0 | 1
Sets the UL-DMRS-add-pos for A.3, A.4 and A.5 in 38.141.
Choices: 1 | 2
Sets the Number of Layers for A.3 and A.4 in 38.141.
Default: Disabled
Click the checkbox to enable (checkmarked) or disable Transform Precoding for uplink.
Choices: Type A | Type B
Default: Type A
Sets the PUSCH Mapping type for the channel.
Refer to UL FRC Update in 38.141 v16.9.0 for more information.
Choices: Based on the Annex A in 38.141
Selects the Reference Channel based on the FRC Type (DMRS-add-pos and Number of Layers).
Refer to UL FRC Update in 38.141 v16.9.0 for more information.
Choices: TDD | FDD
Selects the duplex type.
When TDD is selected, several TDD parameters appear below. These TDD parameters are reset to default values whenever numerology changes or FR changes. (The default values are different for each numerology.)
Sets the periodicity of DL-UL pattern. The choices are related to numerology.
Read-only.
Sets the number of consecutive full DL slots at the beginning of each DL-UL pattern. The range is related to the numerology and slot configuration period.
Read-only.
Range: 0 ~ 14 for Normal CP; 0 ~ 12 for Extended CP
Sets the number of consecutive DL symbols in the beginning of the slot following the last full DL slot.
Read-only.
Sets the number of consecutive full UL slots at the end of each DL-UL pattern. The range is related to the numerology and slot configuration period.
Read-only.
Range: 0 ~ 14 for Normal CP; 0 ~ 12 for Extended CP
Sets the number of consecutive UL symbols in the end of the slot preceding the first full UL slot.
Read-only.
Displays the number of special slots.
Read-only.
Displays the TDD slot allocation for one period.
Read-only.
Click the checkbox to enable (checkmarked) or disable the Special Slot.
Only appears when Duplex Type is set to TDD.
Choices: Based on the Annex A in 38.141.
"RB Offset" will be shown as "Interlace Index (N)" for NR-U cases (G-FR1-A1-12...19 and G-FR1-A2-8...14).
Choices: 2 | 3
DMRS-typeA-pos is only available for "High Speed Train" cases (G-FR1-A3-33/34/33A/34A and G-FR1-A4-29/30/29A/30A).
The valid value for “Number of UCI Bits” can only be 7 and 40.
This is valid only for G-FR1-A4-11 and G-FR2-A4-3/13.
Choices: Auto | Manual | Off
Default: Auto
Set the phase compensation mode on the baseband signal before upconversion.
Phase compensation is not applicable for PRACH carrier.
Auto: Use the RF frequency from the instrument node.
Manual: Enter the RF frequency manually.
Off: Disable phase compensation on baseband signal.